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| LP5990 Micropower 200mA CMOS Low Dropout Voltage Regulator December 18, 2007 LP5990 Micropower 200mA CMOS Low Dropout Voltage Regulator General Description The LP5990 regulator is designed to meet the requirements of portable, battery-powered systems providing an accurate output voltage, low noise and low quiescent current. The LP5990 will provide a 1.8V output from a low input voltage of 2.2V and can provide 200mA to an external load. When switched into shutdown mode via a logic signal at the enable pin, the power consumption is reduced to virtually zero. Fast shut-down is achieved by the push pull architecture. The LP5990 is designed to be stable with space saving 0402 ceramic capacitors as small as 1F, this gives an overall solution size of < 2.5mm 2. Performance is specified for a -40C to 125C junction temperature range. The device is available in micro SMD Package (0.4mm pitch) and is available with 1.2V,1.3V,1.8V,2.8V,3.0V,3.3V and 3.6V outputs.Lower voltage options down to 0.8V are available on request. For all other output voltage options please contact your local NSC sales office. Features Operation from 2.2V to 5.5V input 1% accuracy over temp range Output voltage from 0.8V to 3.6V in 50mV increments 30 A Quiescent current (enabled) 10nA Quiescent current (disabled) 160mV dropout at 200mA load 60 VRMSOutput voltage noise 60 s start-up time 500s shut-down time PSRR 55 dB at 10 kHz Stable with 0402 1.0F ceramic capacitors Logic controlled enable Thermal-overload and short-circuit protection Package 4-Bump micro SMD,0.4mm pitch (lead free) 866 m x 917 m Applications Cellular phones Hand-held information appliances Typical Application Circuit 20184801 (c) 2007 National Semiconductor Corporation 201848 www.national.com LP5990 Connection Diagrams 4-Bump Thin micro SMD Package, 0.4mm pitch NS Package Number TMD04 20184802 The actual physical placement of the package marking will vary from part to part. Pin Descriptions Pin No. micro SMD A2 A1 B1 B2 VEN GND VOUT VIN Enable input; disables the regulator when 0.35V. Enables the regulator when 1.0V. Common ground. Output voltage. A 1.0 F Low ESR capacitor should be connected to this Pin. Connect this output to the load circuit. Input voltage supply. A 1.0 F capacitor should be connected at this input. Symbol Name and Function Ordering Information micro SMD Package (Lead Free) Output Voltage (V) 1.2 1.3 1.8 2.8 3.0 3.3 3.6 LP5990TM-1.2/NOPB LP5990TM-1.3/NOPB LP5990TM-1.8/NOPB LP5990TM-2.8/NOPB LP5990TM-3.0/NOPB LP5990TM-3.3/NOPB LP5990TM-3.6/NOPB Supplied As 250 Units Tape and Reel 3k Units Tape and Reel LP5990TMX-1.2/NOPB LP5990TMX-1.3/NOPB LP5990TMX-1.8/NOPB LP5990TMX-2.8/NOPB LP5990TMX-3.0/NOPB LP5990TMX-3.3/NOPB LP5990TMX-3.6/NOPB www.national.com 2 LP5990 Absolute Maximum Ratings (Notes 1, 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. VIN Pin: Input Voltage VOUT Pin: Output Voltage VEN Pin: Enable Input Voltage Continuous Power Dissipation (Note 3) Junction Temperature (TJMAX) Storage Temperature Range Maximum Lead Temperature (Soldering, 10 sec.) ESD Rating (Note 4) -0.3 to 6.0V -0.3 to (VIN + 0.3V) to 6.0V (max) -0.3 to 6.0V (max) Internally Limited 150C -65 to 150C 260C Human Body Model Machine Model 2 kV 200V (Note 1), (Note 2) 2.2V to 5.5V 0 to 5.5V (max) 0 to 200 mA -40C to +125C -40C to +85C Operating Ratings VIN: Input Voltage Range VEN: Enable Voltage Range Recommended Load Current (Note 5) Junction Temperature Range (TJ) Ambient Temperature Range (TA) (Note 5) Thermal Properties Junction to Ambient Thermal Resistance JA (Note 6) JEDEC Board (microSMD) (Note 14) 100.6C/W 4L Cellphone Board (microSMD) 174.8C/W Electrical Characteristics Limits in standard typeface are for TA = 25C. Limits in boldface type apply over the full operating junction temperature range (-40 C TJ +125C). Unless otherwise noted, specifications apply to the LP5990 Typical Application Circuit (pg. 1) with: VIN = VOUT (NOM) + 1.0V, or 2.2V, whichever is higher. VEN = 1.0V, CIN = COUT = 1.0 F, IOUT = 1.0 mA. (Note 2), (Note 7) Symbol VIN VOUT Parameter Input Voltage Output Voltage Tolerance Line Regulation Load Regulation ILOAD IQ Load Current Maximum Output Current Quiescent Current (Note 10) VEN = 1.0V, IOUT = 0 mA VEN = 1.0V, IOUT = 200 mA VEN = <0.35V (Disabled) VDO ISC PSRR en TSHUTDOWN Dropout Voltage(Note 9) Short Circuit Current Limit Power Supply Rejection Ratio (Note 13) Output Noise Voltage (Note 13) Thermal Shutdown IOUT = 200 mA (Note 11) f = 10 kHz, IOUT = 200 mA BW = 10 Hz to 100 kHz, V OUT = 1.8V VIN = 4.2V, IOUT = 1 mA V OUT = 2.8V Temperature Hysteresis VIN = (VOUT(NOM) + 1.0V) to 5.5V VIN = (VOUT(NOM) + 1.0V) to 5.5V, IOUT = 1 mA IOUT = 1 mA to 200 mA (Note 8) 0 200 30 35 0.01 160 600 55 60 85 160 20 C 250 mV mA dB VRMS 75 A Conditions Min 2.2 -1 1 5 15 Typ Max 5.5 1 Units V % mV mV mA 3 www.national.com LP5990 Electrical Characteristics (continued). Limits in standard typeface are for TA = 25C. Limits in boldface type apply over the full operating junction temperature range (-40 C TJ +125C). Unless otherwise noted, specifications apply to the LP5990 Typical Application Circuit (pg. 1) with: VIN = VOUT (NOM) + 1.0V, or 2.2V, whichever is higher. VEN = 1.0V, CIN = COUT = 1.0 F, IOUT = 1.0 mA. (Note 2), (Note 7) Symbol VIL VIH IEN Parameter Low Input Threshold (VEN) High Input Threshold (VEN) Input Current at VEN Pin (Note 12) Line Transient (Note 13) Load Transient (Note 13) TON TOFF Turn on Time Turn off Time from Enable Conditions VIN = 2.2V to 5.5V VIN = 2.2V to 5.5V VEN = 5.5V and VIN = 5.5V VEN = 0.0V and VIN = 5.5V Trise = Tfall = 30s. VIN = 600 mV IOUT = 1 mA to 200 mA in 1 s IOUT = 200 mA to 1 mA in 1 s To 98% of VOUT(NOM) 100mV of V OUT(NOM)I OUT= 0mA 1.0 2 0.001 4 -50 50 60 500 mV s s 5 Min Typ Max 0.35 Units V V A Enable Input Thresholds Transient Characteristics VOUT mV Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. Note 2: All voltages are with respect to the potential at the GND pin. Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Note 4: The Human body model is a 100 pF capacitor discharged through a 1.5 k resistor into each pin. The machine model is a 200 pF capacitor discharged directly into each pin. MIL-STD-883 3015.7 Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125C), the maximum power dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (JA), as given by the following equation: TA-MAX = TJ-MAX-OP - (JA x PD-MAX). See applications section. Note 6: Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues in board design. Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm. Note 8: The device maintains a stable, regulated output voltage without a load current. Note 9: Dropout voltage is the voltage difference between the input and the output at which the output voltage drops to 100 mV below its nominal value. This parameter only applies to output voltages above 2.8V. Note 10: Quiescent current is defined here as the difference in current between the input voltage source and the load at VOUT. Note 11: Short Circuit Current is measured with VOUT pulled to 0V. Note 12: There is a 3 M resistor between VEN and ground on the device. Note 13: This specification is guaranteed by design. Note 14: Detailed description of the board can be found in JESD51-7 Output & Input Capacitor, Recommended Specifications Symbol CIN COUT ESR Parameter Input Capacitance Output Capacitance Output/Input Capacitance Conditions Capacitance for stability Min 0.3 0.3 5 Nom 1.0 1.0 10 500 m Max Units F Note: The minimum capacitance should be greater than 0.3 F over the full range of operating conditions. The capacitor tolerance should be 30% or better over the full temperature range. The full range of operating conditions for the capacitor in the application should be considered during device selection to ensure this minimum capacitance specification is met. X7R capacitors are recommended however capacitor types X5R, Y5V and Z5U may be used with consideration of the application and conditions. www.national.com 4 LP5990 Typical Performance Characteristics. (NOM) + 1.0V, VEN = 1.0V, IOUT = 1mA , T A = 25C. Unless otherwise specified,CIN = COUT = 1.0F, VIN = VOUT Output Voltage Change vs Temperature Ground Current vs Load Current 20184899 20184843 Ground Current vs V IN.I LOAD= 1mA Ground Current vs VIN. I LOAD = 200mA 20184854 20184851 Dropout Voltage Load Transient Response VOUT = 2.8V 20184889 20184887 5 www.national.com LP5990 Typical Performance Characteristics (continued). 1.0F, VIN = VOUT(NOM) + 1.0V, VEN = 1.0V, IOUT = 1mA , T A = 25C. Load Transient Response. VOUT = 2.8V Unless otherwise specified,CIN = COUT = Short Circuit Current 20184888 20184886 Line Transient Response Line Transient Response 20184895 20184885 Start-up Time Shutdown Characteristics 20184893 20184890 www.national.com 6 LP5990 Typical Performance Characteristics (continued). 1.0F, VIN = VOUT(NOM) + 1.0V, VEN = 1.0V, IOUT = 1mA , T A = 25C. Power Supply Rejection ratio Unless otherwise specified,CIN = COUT = Output Noise Density 20184844 20184845 7 www.national.com LP5990 Application Hints POWER DISSIPATION AND DEVICE OPERATION The permissible power dissipation for any package is a measure of the capability of the device to pass heat from the power source, the junctions of the IC, to the ultimate heat sink, the ambient environment. Thus the power dissipation is dependent on the ambient temperature and the thermal resistance across the various interfaces between the die and ambient air. As stated in (Note 5) of the electrical characteristics, the allowable power dissipation for the device in a given package can be calculated using the equation: Other ceramic capacitors such as Y5V and Z5U are less suitable owing to their inferior temperature characteristics. (See section in Capacitor Characteristics). For this device the output capacitor should be connected between the VOUT pin and a good ground connection and should be mounted within 1 cm of the device. It may also be possible to use tantalum or film capacitors at the device output, VOUT, but these are not as attractive for reasons of size and cost (see the section Capacitor Characteristics). The output capacitor must meet the requirement for the minimum value of capacitance (0.3F) and have an ESR value that is within the range 5 m to 500 m for stability. CAPACITOR CHARACTERISTICS The LP5990 is designed to work with ceramic capacitors on the input and output to take advantage of the benefits they offer. For capacitance values in the range of 1.0 F to 4.7 F, ceramic capacitors are the smallest, least expensive and have the lowest ESR values, thus making them best for eliminating high frequency noise. The ESR of a typical 1.0 F ceramic capacitor is in the range of 20 m to 40 m, which easily meets the ESR requirement for stability for the LP5990 For both input and output capacitors careful interpretation of the capacitor specification is required to ensure correct device operation. The capacitor value can change greatly depending on the conditions of operation and capacitor type. In particular the output capacitor selection should take account of all the capacitor parameters to ensure that the specification is met within the application.Capacitance value can vary with DC bias conditions as well as temperature and frequency of operation. Capacitor values will also show some decrease over time due to aging. The capacitor parameters are also dependant on particular case size with smaller sizes giving poorer performance figures in general. As an example Figure 1 shows a typical graph showing a comparison of capacitor case sizes in a Capacitance versus DC Bias plot. As shown in the graph, as a result of the DC Bias condition, the capacitance value may drop below the minimum capacitance value given in the recommended capacitor table (0.3F in this case). Note that the graph shows the capacitance out of spec for the 0402 case size capacitor at higher bias voltages. It is therefore recommend that the capacitor manufacturer's specifications for the nominal value capacitor are consulted for all conditions as some capacitors may not be suited in the application. The temperature performance of ceramic capacitors varies by type and manufacturer. Most large value ceramic capacitors (2.2 F) are manufactured with Z5U or Y5V temperature characteristics, which results in the capacitance dropping by more than 50% as the temperature goes from 25C to 85C. A better choice for temperature coefficient in a ceramic capacitor is X7R. This type of capacitor is the most stable and holds the capacitance within 15% over the temperature range. Tantalum capacitors are less desirable than ceramic for use as output capacitors because they are more expensive when comparing equivalent capacitance and voltage ratings in the 0.47 F to 4.7 F range. Another important consideration is that tantalum capacitors have higher ESR values than equivalent size ceramics. This means that while it may be possible to find a tantalum capacitor with an ESR value within the stable range, it would have to be larger in capacitance (which means bigger and more costly) than a ceramic capacitor with the same ESR value. It should also be noted that the ESR of a typical tantalum will The actual power dissipation across the device can be represented by the following equation: PD = (VIN - VOUT) x IOUT This establishes the relationship between the power dissipation allowed due to thermal consideration, the voltage drop across the device, and the continuous current capability of the device. These two equations should be used to determine the optimum operating conditions for the device in the application. EXTERNAL CAPACITORS Like any low-dropout regulator, the LP5990 requires external capacitors for regulator stability. The LP5990 is specifically designed for portable applications requiring minimum board space and smallest components. These capacitors must be correctly selected for good performance. INPUT CAPACITOR An input capacitor is required for stability. The input capacitor should be at least equal to or greater than the output capacitor. It is recommended that a 1.0 F capacitor be connected between the LP5990 input pin and ground. This capacitor must be located a distance of not more than 1 cm from the input pin and returned to a clean analogue ground. Any good quality ceramic, tantalum, or film capacitor may be used at the input. Important: To ensure stable operation it is essential that good PCB practices are employed to minimize ground impedance and keep input inductance low. If these conditions cannot be met, or if long leads are to be used to connect the battery or other power source to the LP5990, then it is recommended to increase the input capacitor to at least 2.2F. Also, tantalum capacitors can suffer catastrophic failures due to surge current when connected to a low-impedance source of power (like a battery or a very large capacitor). If a tantalum capacitor is used at the input, it must be guaranteed by the manufacturer to have a surge current rating sufficient for the application. There are no requirements for the ESR (Equivalent Series Resistance) on the input capacitor, but tolerance and temperature coefficient must be considered when selecting the capacitor to ensure the capacitance will remain 0.3 F over the entire operating temperature range. OUTPUT CAPACITOR The LP5990 is designed specifically to work with very small ceramic output capacitors. A ceramic capacitor (dielectric types X5R or X7R) 1.0 F, and with ESR between 5 m to 500 m, is suitable in the LP5990 application circuit. www.national.com 8 LP5990 increase about 2:1 as the temperature goes from 25C down to -40C, so some guard band must be allowed. device on. When the enable pin is low, the regulator output is off and the device typically consumes 3 nA. If the application does not require the shutdown feature, the VEN pin should be tied to VIN to keep the regulator output permanently on. The signal source used to drive the VEN input must be able to swing above and below the specified turn-on/off voltage thresholds listed in the Electrical Characteristics section under VIL and VIH. micro SMD MOUNTING The micro SMD package requires specific mounting techniques, which are detailed in National Semiconductor Application Note AN-1112. For best results during assembly, alignment ordinals on the PC board may be used to facilitate placement of the micro SMD device. micro SMD LIGHT SENSITIVITY Exposing the micro SMD device to direct light may cause incorrect operation of the device. Light sources such as halogen lamps can affect electrical performance if they are situated in proximity to the device. Light with wavelengths in the red and infra-red part of the spectrum have the most detrimental effect thus the fluorescent lighting used inside most buildings has very little effect on performance. 20184840 FIGURE 1. Graph Showing a Typical Variation in Capacitance vs DC Bias NO-LOAD STABILITY The LP5990 will remain stable and in regulation with no external load. ENABLE CONTROL The LP5990 may be switched ON or OFF by a logic input at the ENABLE pin, VEN . A high voltage at this pin will turn the 9 www.national.com LP5990 Physical Dimensions inches (millimeters) unless otherwise noted 4-Bump Thin micro SMD NS Package Number TMD04 CEA The dimensions for X1, X2 and X3 are given as: X1 = 0.866 mm 0.030 mm X2 = 0.917 mm 0.030 mm X3 = 0.600 mm 0.075 mm www.national.com 10 LP5990 Notes 11 www.national.com LP5990 Micropower 200mA CMOS Low Dropout Voltage Regulator Notes For more National Semiconductor product information and proven design tools, visit the following Web sites at: Products Amplifiers Audio Clock Conditioners Data Converters Displays Ethernet Interface LVDS Power Management Switching Regulators LDOs LED Lighting PowerWise Serial Digital Interface (SDI) Temperature Sensors Wireless (PLL/VCO) www.national.com/amplifiers www.national.com/audio www.national.com/timing www.national.com/adc www.national.com/displays www.national.com/ethernet www.national.com/interface www.national.com/lvds www.national.com/power www.national.com/switchers www.national.com/ldo www.national.com/led www.national.com/powerwise www.national.com/sdi www.national.com/tempsensors www.national.com/wireless WEBENCH Analog University App Notes Distributors Green Compliance Packaging Design Support www.national.com/webench www.national.com/AU www.national.com/appnotes www.national.com/contacts www.national.com/quality/green www.national.com/packaging www.national.com/quality www.national.com/refdesigns www.national.com/feedback Quality and Reliability Reference Designs Feedback THE CONTENTS OF THIS DOCUMENT ARE PROVIDED IN CONNECTION WITH NATIONAL SEMICONDUCTOR CORPORATION ("NATIONAL") PRODUCTS. NATIONAL MAKES NO REPRESENTATIONS OR WARRANTIES WITH RESPECT TO THE ACCURACY OR COMPLETENESS OF THE CONTENTS OF THIS PUBLICATION AND RESERVES THE RIGHT TO MAKE CHANGES TO SPECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE. NO LICENSE, WHETHER EXPRESS, IMPLIED, ARISING BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. TESTING AND OTHER QUALITY CONTROLS ARE USED TO THE EXTENT NATIONAL DEEMS NECESSARY TO SUPPORT NATIONAL'S PRODUCT WARRANTY. EXCEPT WHERE MANDATED BY GOVERNMENT REQUIREMENTS, TESTING OF ALL PARAMETERS OF EACH PRODUCT IS NOT NECESSARILY PERFORMED. NATIONAL ASSUMES NO LIABILITY FOR APPLICATIONS ASSISTANCE OR BUYER PRODUCT DESIGN. BUYERS ARE RESPONSIBLE FOR THEIR PRODUCTS AND APPLICATIONS USING NATIONAL COMPONENTS. PRIOR TO USING OR DISTRIBUTING ANY PRODUCTS THAT INCLUDE NATIONAL COMPONENTS, BUYERS SHOULD PROVIDE ADEQUATE DESIGN, TESTING AND OPERATING SAFEGUARDS. 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Copyright(c) 2007 National Semiconductor Corporation For the most current product information visit us at www.national.com National Semiconductor Americas Customer Support Center Email: new.feedback@nsc.com Tel: 1-800-272-9959 National Semiconductor Europe Customer Support Center Fax: +49 (0) 180-530-85-86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 69 9508 6208 English Tel: +49 (0) 870 24 0 2171 Francais Tel: +33 (0) 1 41 91 8790 National Semiconductor Asia Pacific Customer Support Center Email: ap.support@nsc.com National Semiconductor Japan Customer Support Center Fax: 81-3-5639-7507 Email: jpn.feedback@nsc.com Tel: 81-3-5639-7560 www.national.com |
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